(Editorial) Rocking the world with advanced package technology – Samsung Global Newsroom

The “Beyond Moore” Era: Pushing the Limits of Semiconductors

In the past, technological advancements in the world of semiconductors revolved around who could make transistors smaller and put more of them on a single chip. Gordon Moore predicted that the density of transistors on a chip doubles every 24 months — the famous “Moore’s Law”. Although it has undergone some adjustments throughout history to reflect the speed of technological growth, “Moore’s Law” has been regarded as the fundamental principle of the development of semiconductor technology over the past five years. decades.

Today’s era of smartphones, mobile internet, AI, and big data demands ever-faster computing performance. However, the speed of semiconductor innovation and technological advancement has slowed, and chip miniaturization has reached physical limits, slowing the rate at which transistors become smaller. In other words, we are now behind Moore’s Law.

The market also demands that semiconductors be versatile, encompassing a variety of features such as analog or RF wireless communication in a single chip. But as the semiconductor process becomes more and more miniaturized, it becomes more and more difficult to maintain analog performance. It is indeed becoming difficult to meet the needs of the market by the sole miniaturization of processes based on Moore’s law.

In order to overcome these limitations of semiconductor technology, an approach that goes beyond existing Moore’s Law is needed, and we call it “Beyond Moore”.

“Advanced Package, Beyond Moore Era Leader”

Our answer to the Beyond Moore era is Advanced Package technology. With advanced heterogeneous integration, which connects multiple chips horizontally and vertically, more transistors can be planted on a single chip (or package) and deliver performance more powerful than the sum of all the parts.

According to market research, the CAGR of the advanced packaging industry is estimated to grow at a rate of 9.6% between 2021 and 2027. In fact, 2.5D¹ and 3D packages² the implementation of heterogeneous integration is expected to show an even higher growth rate of 14%.

Governments are also very attentive. South Korea’s Ministry of Commerce, Industry and Energy hosted a semiconductor packaging technology forum in February, while the US Department of Defense’s Defense Advanced Research Projects Agency (DARPA) announced the large-scale budget allocation for advanced enclosure-related areas. last April. The Japanese government also announced new incentives to attract research centers, as well as the creation of a dedicated symposium.

“One-stop advanced package solution with high performance and low power consumption”

In response to the growing importance of advanced packaging technology, Samsung Electronics established the AVP (Advanced Package) Business Team within the Device Solutions Division last December to enhance the company’s capabilities in of advanced packaging technology and to maximize synergy between business units.

Samsung Electronics, with industry-leading expertise in memory, logic foundry, and packages, is well positioned to use heterogeneous integration to deliver competitive 2.5D and 3D packages that connect semiconductors advanced logic products with EUV and high-performance memory semiconductors such as HBM.

The AVP business team operates under a business model that provides advanced one-stop global solutions that enable high-performance, low-power solutions. We communicate closely and directly with customers to provide solutions tailored to the needs of each customer and product. Our focus areas are the development of next-generation 2.5D and 3D advanced package solutions based on RDL,³ If Interpose/Bridge⁴ and SVT⁵ stacking technologies.

“Our future beyond connection”

The goal of the AVP Business Team is “hyper-connection” (or “hyper-integration”). “Hyper-connection” is more than just the sum of the performance and functions of each semiconductor. We envision creating greater synergy that connects semiconductors to the world, connects people to people, and connects customers’ imaginations to reality.

Samsung Electronics is committed to a competitive development and production strategy, with proprietary packaging technology consistent with the big box trend. Based on customer-focused business development that ensures quick responses to customer demands, AVP’s business team will bring the products of the imagination to life.

¹ 2.5D package: package that integrates a single-layer logic semiconductor and a multi-layer memory semiconductor together on a substrate
² 3D package: a package in which multiple logic/memory semiconductors are vertically integrated
³ RDL (Redistribution Layer): advanced packaging technology that places an additional metal layer between a small and a large circuit board to integrate the two
⁴ Si Interposer/Bridge: The microcircuit card inserted between the IC chip and the PCB, which physically connects the chip and the board by acting as the middle level wiring
⁵ TSV (Through Silicon Via): Advanced package technology that grinds the surface of the chip, drills hundreds of microscopic holes and connects electrodes that penetrate vertically into the holes of the top and bottom chips.